Embodiments of the inventive concept relate generally to semiconductor memory devices. More particularly, embodiments of the inventive concept relate to nonvolatile memory devices and methods of programming the nonvolatile memory devices.
Semiconductor memory devices can be roughly divided into two categories based on whether or not they retain stored data when disconnected from power. These categories include volatile memory devices, which lose stored data when disconnected from power, and nonvolatile memory devices, which retain stored data when disconnected from power.
Examples of volatile memory devices include dynamic random access memory (DRAM) and static random access memory (SRAM), and examples of nonvolatile memory devices include erasable programmable read only memory (EEPROM), ferroelectric random access memory (FRAM), phase change random access memory (PRAM), and flash memory.
In recent years, the number of electronic devices employing flash memory has increased dramatically. For instance, many modern devices now use flash memory as a primary or secondary source of long term data storage. Examples of such devices include various MP3 players, digital cameras, cellular phones, camcorders, flash cards, and solid state disks (SSD), to name just a few.
In response to the increasing demand for flash memory, researchers have developed a number of approaches for increasing the storage capacity of flash memories. One of these approaches involves storing more than one bit of data per memory cell. A flash memory device that stores more than one bit per memory cell is referred to as a multi-level cell (MLC) flash memory.
A flash memory cell can be programmed with multiple bits of data by adjusting its threshold voltage between multiple different states. For instance, a flash memory cell can be programmed to store two bits of data by adjusting its threshold voltage between four states, or ranges, corresponding to different values of the two bits, such as “00”, “01”, “10”, and “11”.
In order to accurately read data from a memory cell storing more than one bit, a MLC flash memory must be able to reliably distinguish between the different threshold voltage states. One way to ensure that the states can be distinguished from each other is to maintain sufficiently large read margins between the states. In other words, the ranges of threshold voltages that correspond to each state must be separated from each other by a large enough margin to prevent them from being confounded under a variety of circumstances.
One way to ensure adequate read margins between the threshold voltage states of a memory cell storing multiple bits is to program the memory cell using an incremental step pulse programming (ISPP) scheme. In the ISPP scheme, multiple program loops are performed on the memory cell to incrementally adjust its threshold voltage to within a desired range. In conventional ISPP schemes, each program loop typically comprises a program step in which an incrementally adjusted program pulse is applied to the memory cell to change its threshold voltage by a gradual amount, and a verify step that verifies whether the threshold voltage has arrived at the desired range.